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rev 5 november 2005 1/11 11 STS7PF30L p-channel 30v - 0.16 - 7a - so-8 stripfet? ii power mosfet general features standard outline for easy automated surface mount assembly low threshold drive description this power mosfet is the latest development of stmicroelectronics? unique ?single feature size?? strip-based process. the resulting transistor shows extremely high packing densisty for low on-resistance, rugged avalanche characteristics and less critical alignment steps, therefore a remarkable manufacturing reproducibility. applications battery management in nomadic equipment. battery management in nomadic equipment internal schematic diagram type v dss r ds(on) i d STS7PF30L 30v <0.021 7a so-8 www.st.com order codes sales type marking package packaging STS7PF30L s7pf30l so-8 tape & reel
1 electrical ratings STS7PF30L 2/11 1 electrical ratings table 1. absolute maximum ratings table 2. thermal data symbol parameter value unit v ds drain-source voltage (v gs = 0) 30 v v dgr drain-gate voltage (r gs = 20k ) 30 v v gs gate-source voltage 20 v i d drain current (continuous) at t c = 25c 7a i d drain current (continuous) at t c = 100c 4.4 a i dm note 1 drain current (pulsed) 28 a p tot total dissipation at t c = 25c 2.5 w rthj-amb note 2 thermal resistance junction-ambient 50 c/w t j t stg operating junction temperature storage temperature range 150 -55 to 150 c c
STS7PF30L 2 electrical characteristics 3/11 2 electrical characteristics (t j = 25 c unless otherwise specified) table 3. on/off states table 4. dynamic table 5. switching times symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250a, v gs = 0 30 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating, v ds = max rating, t c =125c 1 10 a a i gss gate body leakage current (v ds = 0) v ds = 16v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250a 11.62.5v r ds(on) static drain-source on resistance v gs = 10 v, i d = 3.5a v gs = 4.5 v, i d = 3.5a 0.011 0.016 0.016 0.022 0.021 0.028 symbol parameter test conditions min. typ. max. unit g fs note 3 forward transconductance v ds = 20v , i d = 3.5a 16 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1mhz, v gs =0 2600 523 174 pf pf pf q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 15v, i d = 7a, v gs = 4.5v 28 8.75 12.35 7nc nc nc symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 15v, i d = 3.5a r g = 4.7 , v gs = 4.5v, (see figure 13) 68 54 ns ns t d(off) t f turn-off delay time fall time v dd = 15v, i d = 3.5a r g = 4.7 , v gs = 4.5v, (see figure 13) 65 23 ns ns
2 electrical characteristics STS7PF30L 4/11 table 6. source-drain diode (1) pulse with limited by safe operating area (2) when mounted on 1inch2 fr-4 board (t 10s) (3) pulsed: pulse duration = 300s, duty cycle 1.5% note: for the p-channel mosfet the polarity of voltages and current have to be reversed symbol parameter test conditions min. typ. max. unit i sd i sdm note 1 source-drain current source-drain current (pulsed) 7 28 a a v sd forward on voltage i sd = 7a, v gs = 0 1.2 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 7a, di/dt = 100a/s v dd = 15v, t j = 150c (see figure 15) 40 46 2.3 ns nc a
STS7PF30L 2 electrical characteristics 5/11 2.1 electrical characteristics (curves) figure 1. safe operating area figure 2. thermal impedance figure 3. output characteristics figure 4. transfer characteristics figure 5. transconductance figure 6. static drain-source on resistance
2 electrical characteristics STS7PF30L 6/11 figure 7. gate charge vs gate-source voltage figure 8. capacitance variations figure 9. normalized gate threshold voltage vs temperature figure 10. normalized on resistance vs temperature figure 11. source-drain diode forward characteristics figure 12. normalized breakdown voltage vs temperature
STS7PF30L 3 test circuits 7/11 3 test circuits figure 13. switching times test circuit for resistive load figure 14. gate charge test circuit figure 15. test circuit for inductive load switching and diode recovery times
4 package mechanical data STS7PF30L 8/11 4 package mechanical data in order to meet environmental requirements, st offers these devices in ecopack? packages. these packages have a lead-free second level interconnect . the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com
STS7PF30L 4 package mechanical data 9/11 dim. mm. inch min. typ max. min. typ. max. a 1.75 0.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.25 0.5 0.010 0.019 c1 45 (typ.) d 4.8 5.0 0.188 0.196 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 f 3.8 4.0 0.14 0.157 l 0.4 1.27 0.015 0.050 m 0.6 0.023 s 8 (max.) so-8 mechanical data
5 revision history STS7PF30L 10/11 5 revision history date revision changes 13-dec-2003 1 first issue 25-jun-2004 2 preliminary data 18-jan-2005 3 modified value on table 5 29-sep-2005 4 complete version 09-nov-2005 5 new template
STS7PF30L 5 revision history 11/11 i nformation furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the con sequence s o f use of such information nor for any infringement of patents or other rights of third parties which may result from its use. n o license is grante d b y implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicatio n are subje ct t o change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics produ cts are n ot a uthorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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